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Version:

Nov 16, 2016:
Revised: v1.2

Schematic error corrected. D4 should go to pin 6 not pin 3. Sorry!!! Schematic (Figure 6) has been corrected.

PCB layout added thanks to Cristi YO3FLR

Low Current Flexible si5351-based Digital VFO

The new Silicon Labs si5351s oscillator chip and a Nokia 5110/3310 graphics LCD display lie at the heart of this versatile digital multi-output VFO for amateur radio applications. 
Note: An error in the previously published schematic (Figure 6) has
now been corrected. My sincere apologies to everyone affected!

But here's a positive thing - Thanks to the work of Cristi YO3FLR, a PCB
layout for the design is now available. See below. Thanks again, Cristi!
Li-Ion battery monitor board
Figure 1 : The prototype of my si5351a digital VFO during testing on my bench - Wires everywhere!


Introduction

This VFO is my latest design in what seems to be an ongoing series of developments. It began back in 2008 with the publication of my AD9850-based DDS VFO in Silicon Chip magazine in Australia, and republished in EPE magazine in the UK about a year later. That design is outlined on my website here.





Figure 2 : One of my previous AD9850-based designs was published in Silicon Chip magazine and in EPE in the UK




Originally, the AD9850 chip used in that VFO was very expensive, over $US100 each when they were first released, as I recall. The only way for amateurs to use it was to obtain a free sample from Analog Design. Analog Design was very generous in providing samples to enthusiasts, myself included. I suspect that this generous approach contributed to the popularity of their DDS devices in subsequent years.

Around 2010 or 2011, low cost modules containing the AD9850 and the other parts required to make a viable RF oscillator began to appear from Chinese sources. Amazingly, the price had fallen for the complete module to less than $US10. Again, I used several of these in various designs. Most recently, I used one in the VFO of my Lydford 40m transceiver. That VFO (and the module) is described here on my website.

Figure 3 : An AD9850-based VFO using one of the Chinese-made modules was designed
for use in my 40m Lydford SSB transceiver
 

These AD9850 VFOs had a couple of issues. First, they were limited to frequencies below about 40MHz with their standard 125MHz crystal oscillator. The second problem was their current consumption. The modules and chips I used over the years required about 200mA. Low power QRP or battery operation was not entirely practical.

The Search for a New Chip

Looking around for some alternatives, about 18 months ago, I looked carefully at the (then) new si570 chips. These contain a programmable digital oscillator using an internal UHF VCO and a programmable phase locked loop (PLL) referenced to an internal crystal. The chip could be programmed by an external microcontroller via its I2C interface.

While the si570 could operate at 160MHz (for the cheapest version) or 1400MHz (for the most expensive), and its output noise level was very good, the price of the least costly device in the family (About $US20) made it too costly for me to consider. The 1400MHz version was almost $US80. The chips were also a little more difficult to program for continuous tuning applications, and outputs below 10MHz were outside specification. Current drain was still fairly high, around 80 to 120mA depending on the version. Still not a great choice for battery powered QRP use.

Looking around further, I stumbled across some references to the Cirrus Logic CS2000 chip, a
nd after considerable additional effort, I also managed to purchase a few samples. Long story short: I encountered a bunch of problems with the devices. The datasheet was cryptic, the application notes non-existent, the vendor’s design software failed to run properly, they didn’t reply to questions about their devices, and the parts I purchased failed to operate correctly. Of the positives, the (claimed) range was 2 – 75MHz, the current drain was just 20mA, and the price was acceptable, especially compared to those si570 chips) at about $US9 each.

Figure 4 : One of my recent designs for an
RF oscillator is based on the CS2000
chip and described elsewhere on my website
but this new si5351 VFO is much better!


Eventually, I got the CS2000 chips tamed, no thanks at all to Cirrus Logic. The resulting simple signal generator design is described elsewhere on my website. But I don’t recommend using those devices (or anything else from Cirrus Logic!). There are better parts elsewhere, and much better vendors who actually try to help designers get their products working.

The Arrival of the si5351a

Not long afterwards, I came across some work being done on the new Silicon Labs si5351a CMOS clock chip. It was similar to the si570, but with a number of additional features.

Like the si570, it contains a pair of UHF VCOs coupled with PLLs. Three programmable dividers take one of these two PLL outputs and generate three separate clock outputs; Three square-wave outputs anywhere from 2.5kHz to 200MHz according to the datasheet. VFO current consumption looked to be in the 20-30mA range at 3.3V. That all looked promising.

The chip was readily available, and the price was acceptable. Just over US$1 each! Yes, definitely priced in my budget. That’s the device shown here somewhat larger than life. It’s actually quite tiny – About 3mm x 3mm.

I could even buy the si5351a pre-mounted on a daughter-board complete with 5V interfaces for the I2C control lines, ready to roll, from Adafruit. Cool.

So, what’s not to like? Well, there are some issues. The outputs are not as free from phase noise as its older brother, the si570. And while it improves on the si570 with three outputs (the si570 has just one), in fact in reality you might consider it has just two fully 100% programmable outputs due to the limitation of two upstream PLLs in the device. But the real issue at first glance, frankly, was the programming of that chip. It looked like a real challenge. There are over 150 registers in the device which required individual configuration. Goodness!

To determine the values to load into those registers, there were some less than entertaining mathematics to be done to convert the frequency I wanted into the raw data to be loaded each time that frequency changed. Could I do those calculations quickly enough for a free-tuning VFO? Would processor speed be the ultimate undoing of the project?

Jason Milldrum N6QW, Hans Summers, OE1CGS and others had done some sterling work in developing some useful C code libraries for the si5351a. However, I have a strong dislike for C, and nor did I want to be tied to using the Arduino programming environment and hardware. The Arduino boards are not expensive, but Arduino-based systems do tend to get physically large once everything is added in. There's often lots of wasted space in there.

Also, almost all of the Arduino (and other) designs I’d seen to date appeared to use a 2x16 alphanumeric LCD. Those displays can be quite limiting for a VFO and transceiver panel layout. I want to see several VFO frequencies on my VFO display at a glance, as well as the status of the various VFO settings. Using the Nokia display can make for a more compact front panel layout as well.

Figure 5 : Display of the operating si5351 VFO with blue backlighting more in evidence than is actually the case in real life

With that as the background, what exactly did I want my VFO to do?

Design Objectives

I set out with some clear targets in mind with this design:

That’s quite a list, I think. And I think I've managed to achieve all of them.

The Hardware

The schematic for the VFO is shown below.

Figure 6 : My new low current flexible si5351a VFO uses few parts and operates at 3.3V

At first glance, it might appear a little complex. However, in reality, there are actually very few components in the circuit.

The ATmega328 processor lies at the heart of the VFO and it controls everything. The choice of processor was initially determined by the number of I/O lines required. With the wide range of features I wanted to build into the VFO and the planned use of a high level language compiler, I anticipated the need for a reasonable amount of code space. The ATmega328 (or ATmega328P) has 32k of program space and 8k of RAM, and it’s one of the cheaper processors in the family.

The processor operates at 3.3V to reduce the parts count. It also slightly reduces the current consumption. The si5351a oscillator chip is wired directly to the ATmega328’s I2C interface pins. The Nokia graphics display also connects directly to the processor. The processor operates at 8MHz using its internal clock. No extra processor crystal is required and that reduces the cost a little. The 8MHz clock frequency is the fastest speed that the Mega328 can run with a 3.3V supply. Despite that, it is easily able to meet the demands of this application.

The connection to the Nokia LCD is a little different to normal. Almost every design I’ve seen insists on connecting the display’s CE (Chip Enable), RST (Reset) and even the BL (Backlight) lines. In most cases, these need not be processor controlled. Since the display is operating all the time, the CE and BL pins can just be tied to ground. The RST line only expects a brief “logic low” immediately after power is applied. After that, it’s just held high. It’s therefore possible to just use a simple RC circuit to take care of that. All of this means that just three processor pins are required for the display. Simple.

The rotary encoder is a standard low cost part I purchased from one of the usual Chinese suppliers. The  pushbuttons are similarly all standard low cost momentary PCB-mounted switches which cost a few cents each from any of the usual suppliers.

The RIT control is a standard linear variable resistor. At mid-position, with the knob adjusted to “12-noon”, there is no frequency shift when RIT is turned on. Rotating it fully clockwise, to about “5 o’clock”, the received frequency will rise by 2.5kHz. If it is fully counter-clockwise, about “7 o’clock”, the received frequency will fall by 2.5kHz. For me, this range is about right for fine tuning for either SSB and CW operation.

A low voltage drop low power 3.3V three pin regulator (TS2950CT33) is used to power everything. It's in a tiny TO-92 package. The input voltage can fall as low as about 4V before it falls out of regulation, and can rise as high as 15V without difficulty. That’s possible because the entire VFO draws just 30mA. It only dissipates about 40mW at most. Ideal for battery powered QRP transceivers.

And that’s it. I’ve not added any additional oscillator output buffers to the outputs of the si5351a because these already exist in my transceiver. However, your application may require these. 

Software

All of the software is written in Bascom, the Basic-like language for the AVR processor family.  I’ve made the software available for download below for non-commercial use only. At present, this download file just consists of the HEX code. Once the code is a little more stable (I may add a few more features and fix a few bugs, when/if any surface...) then I'll provide the source code available for download as well, depending on interest. 

So, what does the software actually do? Well, most of the time, the software simply displays the S-meter voltage and looks at the rotary encoder and pushbuttons to see if the user changes anything. Since the rotary encoder is most timing-critical device, a background timer continually checks its status. The pushbuttons and the RIT control are just checked periodically.

Any change will result in a calculation of the new data. This is then converted to the correct sequence of about 20 bytes for each of the two oscillator outputs (the VFO and the BFO/CIO), and the data send to the si5351. The information on the LCD is then updated to reflect the new status.

And then the processor returns to look for the next change in a switch or encoder.

VFO Display

Since the VFO supports dual VFOs (VFO A and VFO B), the LCD reports the frequency of the currently active VFO in large characters (and generated at output CLK0) as well as the frequency of the alternative VFO. The latter frequency is displayed using smaller characters to make the frequency selection clearer. It’s possible to swap between these two VFOs at any time with the A/B pushbutton or to save the current VFO A frequency in the VFO B memory. This is quite useful for DX operation, for example, for capturing a frequency you wish to return to check periodically while tuning and operating elsewhere on the band.

Both frequencies are displayed to 1Hz resolution although the smallest supported tuning step is 5Hz. Both features and values like almost everything else in the design are easily changed in the software.

Below this information, the LCD also displays details about the general configuration of the VFO. This includes (Fourth row on the display, left to right):


Text is used for the first two items while icons are used for the last three on the list.

Finally, a basic S-meter (signal strength) is displayed as a bar-graph along the bottom line of the LCD. (The actual display is slightly different from that shown here because I've reverted to a continuous bar for simplicity) This S-meter bargraph is periodically updated based on the DC voltage on the S-meter input pin on the VFO board. It assumes a standard input from 0 – 5V where 0V = no signal and 5V = maximum signal. It is currently uncalibrated although additional software could be added into the appropriate subroutine by those wanting a more precise S-meter. I didn't do this because every transceiver tends to have a slightly different characteristic in that area.

Construction

Depending on demand, I may design a PCB for the VFO. Alternately, given the minimal number of parts, it’s probably almost as easy to duplicate my construction method. I built my prototype on a piece of prototyping board. I used  0.1” pin strips on the VFO board for the external connections, such as for the display. I soldered a matching 0.1" socket strip on the Nokia board to allow the display to directly plug on top of the main processor board. Similar connectors were used for the RIT control, the PTT input and the S-meter input. The BPF select outputs can use a similar connector, although I used a 6-pin DIL socket here because that’s all I had available at the time.







Figure 7 : The prototype prior to the addition of the S-meter input and BPF output connectors. The si5351 is mounted on a small SMD-DIL adapter PCB alongside its 25MHz crystal. I also added another couple of pushbuttons after this photo was taken.




The LP2950-type 3.3V regulator comes in a small TO-92 package. It never gets even slightly warm in operation and therefore does not require any form of heatsink. That's a far cry from the LM7805 regulator for my older AD9850 DDS VFO designs which could get hot enough to cook sausages.

The Nokia display is a standard module available from the usual Chinese suppliers. These have the glass LCD display with its on-display LCD controller held in place on a small PCB by means of a folded metal cover. The clips on this metal cover hold the display against a flexible conductive rubber connector to make the connections between the display and the contacts on the PCB.

One word of warning: Perhaps unsurprisingly, some low-cost component suppliers in the depths of China seem to lack any form of quality control. Of the six Nokia LCD modules I bought recently, only one worked on arrival, and two partly worked. The remainder just did not work at all. I ended up designing and building a little board to test the displays using (Gasp!) an AT89C2051 which I happened to have floating around my parts bin. By carefully pulling each Nokia display assembly apart, cleaning each of the parts, carefully reassembling and retensioning each assembly, and then retesting them on my test jig, I managed to get all of the displays operating. Some took three tries before they started to work.

Figure 8 : A disassembled Nokia display module during the cleaning and elastomeric connector realignment process

Since the si5351a is only available in the 10-pin SMD package, I used a small SMD-to-DIP adapter board to mount it. Soldering the chip onto the adapter board is fairly simple. This was then mounted on the VFO board. If I designed a PCB for the VFO, I would be tempted to design it for an SMD version of the ATmega processor and regulator to minimize the overall size of the VFO. It would likely end up no larger than the Nokia display board. Nice thought.

Alignment, Changes and Modifications

In operation, the 25MHz crystal driving the si5351a can be up to 3kHz off-frequency. It’s caused by a combination of manufacturer accuracy, price, ambient temperature and loading on the crystal from the si5351. In short, the value of the constant “xtal” used in the software may require adjustment.

Once the VFO is operating, set the VFO to output 25.0000MHz, measure the actual output with an accurate frequency counter, and change the value of the constant accordingly. Recompile the software and reflash the processor. Done.

The software is written assuming an IF of 8867kHz. Again, this value (for the BFO/CIO) is recorded in the software and can be changed to suit your requirements. A similar constant records the operating frequency at which the VFO switches from high-side (VFO output frequency = operating frequency + IF frequency) to low-side injection (VFO output frequency = operating frequency – IF frequency). Later enhancements could add a band-specific flag to indicate high side or low side injection. For now, this simple system works.

Each band (160m, 80m etc) has two startup frequencies stored in the program as constants for VFO A and VFO B on each band. These are recalled by the VFO at power-up and stored into the eighteen band memories (i.e. Two VFOs per band x 9 bands). As you change bands while using the VFO, the last pair of frequencies used on each band are saved in memory. When you return to that band, those settings are reloaded.

These values, stored in processor RAM, are lost when the power is turned off. Those wanting longer term storage can amend the software to use the processor’s EEPROM memory. There’s no shortage of it in the ATmega328.  Or add battery backup to the processor and send it into power-down mode when the VFO is turned off.

Note: At time of writing, the software consumes about 50% of the 32kB of program space in the ATmega328. That’s well beyond the limit of the free-download version of Bascom. Once any remaining bugs are eradicated, I'll upload the source code here as well. If you need to modify and recompile that software for the VFO, you may need to find a friend with a full version of Bascom or purchase a copy for yourself. Just so you know...


Figure 9 : Here's the updated prototype with more stuff hanging off it. The cluster of four LEDs at top centre was added to test the band output lines. The daughterboard with two switches at the centre foreground was to add the extra "A=B" and "Band Down" buttons. Finally, the potentiometer at top left was added to test the S-meter display. All a bit rough.




Figure 10 : And underneath the display, you can see along the top edge of the board, from left to right,  the PTT input, S-meter input, and RIT input with the RIT pot plugged in. The jumper to the right of the band select test LEDs allowed selection of power during programming (via the board regulator or from the programmer).







Final Thoughts

In short, there’s plenty of space to add further features. There are three pins free for additional pushbuttons or  for outputs to control other stuff. Extending the design to, say, 12 bands or more, or for other more specialised uses should pose few problems.

I've probably left a few loose ends in the code. I've done all this in a month of weekends, basically, so there's bound to be something left undone somewhere. Feel free to let me know.

Oh, almost forgot. Another thought I had was to do a version of this VFO using the small 8-pin Tiny85 and an I2C display. It might  be interesting to see if I could squeeze the essential code down to the basic features and get it to fit in that code space. Then build it all in SMD. I’ll give that some thought.

Added Note: Well, I did give it a bit more thought!  The details can be found over here. The very next weekend after I finished the bulk of the software for this VFO, I built and tested a single band version of the si5351 VFO using the ATtiny85.

So now, you can choose the VFO you prefer. Here's a photo of the two VFOs:



My next step will be to complete the transceiver which I plan to use with the more comprehensive multi-band VFO described on this page.

In the meantime, enjoy!


Figure 11 : One possible front panel layout - I was thinking about what
the PCB layout might look like if I mounted it directly behind the front
panel of the transceiver, so i sketched this drawing as a first step

PCB Layout

Thanks to the efforts of Cristi YO3FLR, a PCB has been deigned for the VFO. Cristi has given approval for the design to be published here.  It's in Sprint Layout-6 format.


Figure 12 : Cristi's PCB layout for this VFO available for download below


Downloads:


ZL2PD_si5351vfoV11.zip : This file contains the Bascom source code and the HEX file for the current version of the VFO. It also contains the other supporting files required to compile the code.

Note: This software is not as efficient as I'd like - It's about 10% larger than it needs to be due to some unnecessary code duplication, but I'll probably sort that out in the next version. I will also modify it from time to time depending on what I discover as I integrate the new VFO with my new transceiver currently under construction. I'm making it available for download here so others can make best use of it too.

Fuse settings for the ATmega328 are:

LOCK Byte: 0ffh (No locks)

EXTd Byte: 0ffh (BOD disabled)

HIGH Byte: 0d9h
    RSTDISBL 1    Not disabled
    DWEN 1     DW not enabled
    SPIEN 0     SPI programming enabled
    WDTON 1       Watchdog timer off
     EESAVE 1      EEPROM not preserved in erase
    BOOTSZ1 0    Boot ROM size
    BOOTSZ0 0
    BOOTRST 1   No boot vector at startup

 LOW Byte:  0e2h
     CKDIV8 1     NOT divided by 8
     CKOUT 1     Not enabled
     SUT1 1         Slow rising power
     SUT0 0
     CKSEL3 0     8 MHz internal RC clock
     CKSEL2 0
     CKSEL1 1
     CKSEL0 0


A potential front panel layout : Just a placeholder to show the approximate positioning of the pushbuttons and their labels - A work in progress...

Here is a PCB layout : Courtesy of Cristi YO3FLR. It is in Sprint Layout-6 format.

Questions? Send me an email. I'll try my best to answer as soon as I can. However, my (paid) work takes priority so it may take a couple of days....or longer if the camel herd needs watering and more fodder.

Special versions? Well, feel free to ask, but it's unlikely I'll have the time to do any special version of the software just for you. However, if your idea interests me and if it has potentially wider application for a number of other users, and if I have some time, I'll have a look at it.

Something doesn't work? Bug reports via email please. Be kind. I wrote the code over a few weekends, and late into the night, so there are probably a few loose ends in there.


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